The cost and size of a single chip receiver can be reduced when the receiver's selectivity filter and the demodulator are completely integrated on the chip. To obtain reasonable power consumption, which is required for longer battery life, the intermediate frequency (IF) chosen for the receiver is typically relatively low, e.g. 200 kHz.
In general, the image reception is suppressed by a combination of a quadrature mixer and a poly-phase filter. The low IF outputs (the I and Q channel) of the quadrature mixer are connected to the input of a poly phase selectivity filter that inherently suppresses the image frequency. The first stages of the poly phase filters are soft-clipping amplifiers to prevent non linear distortion, such as AM to PM conversion, caused by large signals that exceed the linear range of the integrated poly phase filter. Alternatively, the soft-clipping amplifier may be replaced with an automatic gain controlled front-end. Examples of such architectures are found in Brian J. Minnis and Paul A. Moore, “Improvements in or relating to poly phase receivers,” PCT application no. WO 01/39385 A1, May 31, 2001 (“Minnis et al.”), and H. van Rumpt, W. G. Kasperkovitz and J van der Tang, “A digitally programmable zero external components FM radio receiver with 1 uV sensitivity,” ISSCC 2003 (“van Rumpt, et al.”). In a circuit implementation, it is common practice to implement a pre-selectivity filter (e.g. a first order, low-pass filter) immediately following the mixer outputs to create some selectivity before the signal enters the poly phase selectivity filter.
The cut-off frequency of these pre-selectivity filters needs to be at least IF+(Bw/2), where Bw is the signal bandwidth. On the image side, however, these low-pass filters will not reduce the interference up to 2*IF+(Bw/2) frequency distance from the receive channel. The dynamic range of the poly phase filters needs to be high enough to cope with the unfiltered interference at the image side.